1. Field of the Invention
The present invention relates to a semiconductor device and a method of forming the same, and more particularly, to a semiconductor device having transistors with different threshold voltages (Vth) and a method of forming the same.
2. Description of the Prior Art
In traditional semiconductor industry, poly-silicon is conventionally used as a standard material for a gate electrode in semiconductor devices, such as the metal-oxide-semiconductor (MOS). With the trend towards scaling down the size of semiconductor devices, however, conventional poly-silicon gates face problems such as inferior performance due to boron penetration and unavoidable depletion effect. This increases equivalent thickness of the gate dielectric layer, reduces gate capacitance, and worsens a driving force of the devices. Therefore, new materials for gate filling are developed in the related industry. For example, work function metals that are suitable for use with a high dielectric constant (high-k) gate dielectric layer are used to replace the conventional poly-silicon gate as the control electrode.
In addition, with the trend towards scaling down the size of field effect transistors (hereinafter abbreviated as FETs), the development of the conventional planar FETs faces process limitations. For overcome the process limitations, non-planar transistor technology such as fin field effect transistor (hereinafter abbreviated as FinFET) technology has become the mainstream to replace the planar transistors. Generally, in the conventional planar metal gate transistors, the threshold voltage of the transistor is modified by the ion implantation process. However, in the processes of the FinFET, the threshold voltage of the transistor cannot be modified simply by the ion implantation process, and it is an important task to figure out how to improve this disadvantage in the FinFET configuration.